In recent years, miniaturization is demanded of a package (a semiconductor device) in an integrated circuit used in an electronic device. As one example of achieving miniaturization, a through-hole electrode penetrating through a semiconductor substrate is replacing conventional wire bonding.
FIG. 17 is a cross-sectional view showing one example a conventional semiconductor device.
In FIG. 17, a semiconductor device 101 is substantially structured with a semiconductor substrate 102 made of silicon or the like, a via hole 107, a second oxide film 109, a barrier layer 110, and a rewiring layer 111. The via hole 107 extends from a back surface 102b of the semiconductor substrate 102 to reach a pad electrode 105. The second oxide film 109 is formed on the sidewall of the via hole 107 and on the back surface 102b of the semiconductor substrate 102. The barrier layer 110 and the rewiring layer 111 are formed inside the via hole 107 and on the back surface 102b of the semiconductor substrate 102.
FIG. 18 is a flowchart showing a manufacturing method of the conventional semiconductor device. FIGS. 19 to 26 are each a cross-sectional view showing the state at each step in the manufacturing method of the conventional semiconductor device.
First, as shown in FIG. 19, on a first oxide film 106 on a front surface 102a of the semiconductor substrate 102 where a circuit (not shown) is formed, the pad electrode 105 and a passivation film 104 are formed. Thereafter, on the passivation film 104, a supporting substrate 103 is attached through an adhesive (not shown) (step S101 in FIG. 18).
Next, as shown in FIG. 20, on the back surface 102b of the semiconductor substrate 102, a resist 112 is formed for providing an opening at a position corresponding to the pad electrode 105 (step S102 in FIG. 18).
Then, as shown in FIG. 21, by etching the semiconductor substrate 102 using the resist 112 as an etching-purpose mask, the via hole 107 reaching the first oxide film 106 is formed (step S103 in FIG. 18).
Subsequently, as shown in FIG. 22, by etching the first oxide film 106 using the resist 112 as an etching-purpose mask, the via hole 107 reaching the pad electrode 105 is formed (step S104 in FIG. 18).
Next, as shown in FIG. 23, the resist 112 on the back surface 102b of the semiconductor substrate 102 is removed therefrom (step S105 in FIG. 18).
Then, as shown in FIG. 24, the second oxide film 109 is formed inside the via hole 107 and on the back surface 102b of the semiconductor substrate 102 (step S106 in FIG. 18).
Next, as shown in FIG. 25, by etching the second oxide film 109 at the bottom of the via hole 107, the pad electrode 105 is exposed again (step S107 in FIG. 18).
Subsequently, as shown in FIG. 26, the barrier layer 110 and the rewiring layer 111 are formed on the second oxide film 109 in order (step S108 in FIG. 18).
The pad electrode 105 is electrically connected to the back surface 102b of the semiconductor substrate 102 through a through-hole electrode 108 which is structured with the barrier layer 110 and the rewiring layer 111.
The pad electrode 105 and the through-hole electrode 108 contact each other by a contact area corresponding to a diameter of the via hole 107. The resistance value between the bad electrode 105 and the through-hole electrode 108 is determined by the contact area (for example, see Patent Literature 1).
With the conventional semiconductor device, for example, in a case where the pad electrode 105 is reduced in size for the purpose of achieving miniaturization of a chip, the diameter of the via hole 107 must be reduced accordingly. As a result, the aspect ratio of the via hole 107 is increased, and the manufacturing cost increases.